As a substrate inspection apparatus, there has been known a probe apparatus or a burn-in inspection apparatus that performs an electrical characteristic inspection with respect to multiple semiconductor devices formed on a wafer.
FIG. 9 is a cross-sectional view illustrating a schematic configuration of a conventional probe apparatus.
A probe apparatus 100 includes a loader chamber 111 that transfers a wafer W; an inspection chamber 112 which is provided to be adjacent to the loader chamber 111 and performs an electrical characteristic inspection with respect to a semiconductor device formed on the wafer W; and a controller 113 provided at an upper portion of the loader chamber 111. Various devices within the loader chamber 111 and the inspection chamber 112 are controlled by the controller 113 to perform the electrical characteristic inspection with respect to the semiconductor device.
The inspection chamber 112 includes a chuck member 114 that receives the wafer W loaded into the inspection chamber 112 through the loader chamber 111; a mounting table 115 that mounts the chuck member 114 together with the wafer W thereon and moves in X-, Y-, Z-, and θ-directions; a wafer inspection interface 116 that is arranged at a ceiling portion of the inspection chamber 112 and has a head plate 117, a pogo frame 118 constituting a lower surface of the head plate 117, and a probe card 119 supported on a lower surface of the pogo frame 118; and an alignment device 120 that adjusts relative positions between multiple probes (inspection needles) 119b provided on the probe card 119 and electrodes of multiple semiconductor devices formed on the wafer W in cooperation with the mounting table 115.
The alignment device 120 includes an upper imaging unit 121 that moves along a ceiling portion of the inspection chamber 112; and a lower imaging unit 122 that is fixed to the chuck member 114.
A relative position between the wafer W and the probe card 119 is adjusted by the mounting table 115 and the alignment device 120 including the upper imaging unit 121 and the lower imaging unit 122. Then, a lifting device (not shown) of the mounting table 115 is extended to move the chuck member 114 upwardly in FIG. 9, so that the electrodes of the wafer W mounted on the chuck member 114 are respectively brought into contact with the probes 119b of the probe card 119. In this state, the electrical characteristic inspection is performed on the multiple semiconductor devices formed on the wafer W (see, for example, Patent Document 1).
Patent Document 1: Japanese Patent Laid-open Publication No. 2004-140241